Samsung is already talking about being in the early development of totally next-gen DDR6 memory, where during a recent seminar in Suwon, South Korea.
During the seminar, Younggwan Ko, Samsung's Vice President for Test and System Package (TSP) said that packaging technology needs to evolve, as the performance (speed) of memory continues to skyrocket. I mean, DDR5 starts at JEDEC specs of 4800Mbps... but DDR6 flies up to 17,000Mbps.
Korean media outlet The Elec reports: "The previous tenting method only coated areas of the circular copper plate where the circuit patterns will be formed while the other areas were etched out". Ko continued: "But in MSAP, the areas besides the circuits are coated and the empty spaces plated, allowing for finer circuits. As the capacity and data processing speed of memory chips increase, packages must be designed to fit that, the VP said. As the number of layers increases and processes become more sophisticated, the memory package market is also expected to grow exponentially".
- Read more: Samsung's next-gen DDR6 memory: DDR6-12800 and can OC to DDR6-17000!
- Read more: SK Hynix: DDR5 memory in 2020, while DDR6 development begins
In terms of fan-out, another packaging technology where the I/O terminals are placed outside the chip to allow chips to become smaller while retaining the ball layout, Samsung was applying both fan out-wafer level packages (FO-WLP) and fan out-panel level packages (FO-PLP).
Now... speeds... DDR5 has a maximum speed of DDR5-6400 when it comes to JEDEC specifications, but when overclocked we have DDR5 modules hitting DDR5-8500 (and over DDR5-10000 with some super-high-end overclocking).
But when it comes to DDR6 memory, we should expect speeds to kick off at DDR6-12800, while overclocked modules will be capable of reaching the lofty heights of next-gen DDR6-17000 speeds. Wowzers.
Samsung is already talking about being in the early development of totally next-gen DDR6 memory, where during a recent seminar in Suwon, South Korea.
During the seminar, Younggwan Ko, Samsung's Vice President for Test and System Package (TSP) said that packaging technology needs to evolve, as the performance (speed) of memory continues to skyrocket. I mean, DDR5 starts at JEDEC specs of 4800Mbps... but DDR6 flies up to 17,000Mbps.
Korean media outlet The Elec reports: "The previous tenting method only coated areas of the circular copper plate where the circuit patterns will be formed while the other areas were etched out". Ko continued: "But in MSAP, the areas besides the circuits are coated and the empty spaces plated, allowing for finer circuits. As the capacity and data processing speed of memory chips increase, packages must be designed to fit that, the VP said. As the number of layers increases and processes become more sophisticated, the memory package market is also expected to grow exponentially".
- Read more: Samsung's next-gen DDR6 memory: DDR6-12800 and can OC to DDR6-17000!
- Read more: SK Hynix: DDR5 memory in 2020, while DDR6 development begins
In terms of fan-out, another packaging technology where the I/O terminals are placed outside the chip to allow chips to become smaller while retaining the ball layout, Samsung was applying both fan out-wafer level packages (FO-WLP) and fan out-panel level packages (FO-PLP).
Now... speeds... DDR5 has a maximum speed of DDR5-6400 when it comes to JEDEC specifications, but when overclocked we have DDR5 modules hitting DDR5-8500 (and over DDR5-10000 with some super-high-end overclocking).
But when it comes to DDR6 memory, we should expect speeds to kick off at DDR6-12800, while overclocked modules will be capable of reaching the lofty heights of next-gen DDR6-17000 speeds. Wowzers.
